At EuMIC 2023 in Berlin our Ph.D. student Guglielmo De Filippi presented his work entitled "A D-Band Low-Noise-Amplifier with Broadband Multi-Resonance Matching Networks" which proposed a design technique for broadband matching networks based on the theory of doubly-tuned-transformers leading to a D-Band Low-Noise-Amplifier with superior performance. 

The paper is available at the following link: 

https://ieeexplore.ieee.org/document/10288669

At RFIC 2023 in San Diego, CA our Ph.D. student Guglielmo De Filippi presented his work entitled "A SiGe BiCMOS D-Band LNA with Gain Boosted by Local Feedback in Common-Emitter Transistors" which describes the gain boosting technique that led to the demostration of a D-Band Low-Noise-Amplifier with superior performance. 

The paper is available at the following link: 

https://ieeexplore.ieee.org/document/10186168

DRAGON page is available on Linkedin. 

Follow the project advancement by subscribing at this link

www.linkedin.com/company/h2020dragon 

The 4th periodical meeting of DRAGON project partners was hosted by CEA-LETI in Grenoble on the 17th and 18th of January 2023. 

DRAGON project is now entering its final phase with the assembly of the different components developed so far in the final demonstrator. The partner discussed how to address the different challenges and agreed on a common strategy on testing and validation procedure.

https://www.h2020-dragon.eu/dragon-periodical-meeting-of-the-consortium-17-18-january-2023/

Last week at ESSCIRC - ESSDERC 2022 our Ph.D. student Lorenzo Piotto presented his work entitled "A K-band Gilbert-Cell Frequency Doubler with Self-Adjusted 25% LO Duty-Cycle in SiGe BiCMOS Technology" which proposed a novel method for bandwidth enhancement in frequency doublers.

The paper is available at the following link: 

https://ieeexplore.ieee.org/document/9911526

The University of Pavia, in a network with 10 other Italian Universities, has launced the National PhD Program In Micro- and Nano-Electronics.

In partnership with companies of Distretto di Microelettronica (https://www.linkedin.com/company/distretto-di-microelettronica/ ) 28 PhD scholarships are made available by the University of Pavia.

Further information about this PhD program are available on a dedicated website:  phd-mne.unipv.it 

The call for application is now open: /phd.unipv.it/micro-nano-electronics-38/ 

The hard application deadline is July 29th, 2022

Many IC design companies have their offices in Pavia and surrounding.

Most of the companies have tight cooperations with the University for research and education. A partnership has been formally established, named "Distretto di Microelettronica" with the purpose of increasing the visibility, strenghten the cooperations and promote the microelectronic ecosystem:

the official inauguration of the agreement is scheduled for May 26th, 2022. 

The PhD candidate Fabio Quadrelli has contributed to a new paper in the IEEE Journal of Solid States Circuits (JSSC) which presents a complex broadband up/dn conversion module for 5G transceivers realized in 28nm CMOS tecnology. 

The research activity has been supported by Infineon (Villach - Austria) and carried out in tight cooperation with the IC design group of the University of Padova: http://icarus.dei.unipd.it/

The paper is available as an early access article at the following link: 

https://ieeexplore.ieee.org/document/9748103

Un articolo apparso sull'inserto Lombardia del quotidiano Sole 24 Ore, il giorno 1 Aprile 2022 testimonia e descrive la vivace realtà e le opportunità professionali offerte nel settore della microelettronica a Pavia

link per visualizzare l'articolo

Dr. Mahmoud Mahdipour, researcher of the Lab published a journal article in the IEEE Journal of Solid States Circuits (JSSC) which presents an high-performance  frequency multiplier by 6. The chip, realized in the advanced SiGe BiCMOS 55nm technology of STMicroelectronics, is driven by a signal in X-band and deliver output signal at E-band. Novel circuit topologies are introduced which allow over 35dB of unwanted harmonics rejection over a 20GHz bandwidth. 

The IC has been developed within the framework of the European Program DRAGON, aimed at demonstrating high-capacity D-band wireless link for 5G and beyond network infrastructure: www.h2020-dragon.eu

The paper is available as an early access article at the following link: 

https://ieeexplore.ieee.org/abstract/document/9708720

Phase noise of oscillators is a major limit to the performance of high-capacity millimeter-wave wireless links.The Analog ICs Lab of the University of Pavia has developed a novel oscillator circuit able to reach ultra-low phase. A VCO test chip in the STMicroelectronics BiCMOS 55nm technology reaches -138dBc/Hz @ 1MHz offset from 10GHz with 1.2V supply and -190dBc/Hz FoM. The phase noise is at least 10dB lower than what achieved so far by VCOs in silicon at similar frequency. 

A technical paper is presented at the International Solid-State Circuits Conference 2022 (ISSCC),

A. Franceschin, D. Riccardi, A. Mazzanti: “Series-Resonance BiCMOS VCO with Phase Noise of -138dBc/Hz at 1MHz offset from 10GHz and -190dBc/Hz FoM”

Conference website: https://www.isscc.org/

Guglielmo De Filippi and Lorenzo Piotto presented their PhD project at the Huawei - Italy University Challenge 2021. The ambitious project aims to demonstrate D-Band (110-175GHz) as a promising candidate for the future of backhaul links, supporting very high data-rate,  exploiting massive MIMO and beamforming, key features for the upcoming infrastructure requirements (5G/6G).

They were awarded the first prize. 

Huawei Italy University challenge: https://italyuniversitychallenge2021.it/